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RA FastLane (FPGA)

Rapid Addition > RA FastLane (FPGA)

RA Hub provides customers with a high-performance, flexible & highly configurable order routing platform to support a client execution business. Where the target client base includes HFT and DMA trading entities RA Hub can compete more effectively with RA FastLane – FPGA technology that takes RA Hub performance to a level that enables sell-side firms to meet the most exacting performance benchmarks

Key Features

  • Unparalleled speed to exchanges
  • Allows the management of risk in aggregate across multiple sponsored access channels.
  • Asset Class/protocol/technology agnostic – providing quick and easy implementation
  • Risk filters on the critical path implemented in FPGA
  • Advanced risk filters configurable in hub
  • A modular architecture allowing easy implementation of custom business logic in FPGA and software
  • FastLane software implementation provided as back up in case of FPGA board failure.
  • Non critical processes implemented via software (e.g. Market data, Reference price calculation, position Consolidation etc.)
  • Fully integrated TCP/IP stack reducing the cost to market
  • Fully Integrated with RA Hub

Integration with RA Hub

  • Customizable scripts and work flow diagrams
  • A java based open API
  • Integration with external systems (e.g. risk monitoring, OMS, market data)
  • Easy implementation of custom or external algorithms
  • Implementation of custom business logic (e.g. circuit breakers, value of open orders etc.)
  • Full integration of latency and non latency sensitive markets within the same environment

Integration with RA Monitor provides:

  • Advanced alerting and notifications
  • Nanosecond precision time-stamping
  • Latency monitoring and latency alerting
  • Fully scriptable and customizable views (e.g. custom fields, aggregation styles )
  • Historical queries
  • Super-fast message search
  • Full order lifecycle tracking
  • Ability to monitor both RA Hub and other vendor solutions through a single interface.